Field of the Disclosure
The present disclosure relates generally to integrated circuits and, more particularly, to wireline serial link transceivers in integrated circuits.
Description of the Related Art
High-speed wireline serial links may be used to interconnect portions of an integrated circuit. For example, wireline serial links may be used to connect processing devices, such as central processing units (CPUs), graphics processing units (GPUs), or accelerated processing units (APUs), to other processing devices, memory elements, or other circuits. These integrated circuit components therefore may include transmitters or receivers for transmitting or receiving information over the wireline serial link. Signals transmitted from a transmitter to a receiver over a high-speed wireline serial link may be degraded by imperfect return loss caused by reflection of a portion of the signal at a discontinuity such as an impedance mismatch between the transmitter and the receiver. At higher frequencies, degradation in return loss caused by reflections is primarily caused by the capacitive component of the port impedance at the transmitter.
Channel equalization is typically performed in conventional high-speed serial link transmitters using a digital finite impulse response (FIR) filter that is implemented using a plurality of resistive components that are deployed in parallel with each other. Conventional high-speed serial link transmitters also typically implement a resistive tuning circuit to optimize the resistive component of the output impedance to reduce return losses. In practice, the resistive tuning circuit is implemented using the same resistive components as those used to implement the FIR filter, e.g., by including a transistor that can be turned on or off to add or remove the resistors from the parallel circuit. The presence of these transistors incurs a parasitic capacitance, which increases the high-frequency return loss and degrades the transmitted signal.